The present invention generally relates to memory devices for use with computers and other processing apparatuses. More particularly, this invention relates to a non-volatile (permanent) memory-based mass storage device having a memory cache and a shadow memory to facilitate file copies internally on the device.
Mass storage devices such as advanced technology attachments (ATA), Serial ATA, small computer system interface (SCSI) drives, Serially attached SCSI (SAS) and advanced serial interfaces such as USB 2.0 or 3.0 or Gigabit-Ethernet-based solid state drives (SSDs) are rapidly adopting non-volatile memory technology such as flash memory or other emerging solid state memory technology including phase change memory (PCM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM), ferromagnetic random access memory (FRAM), organic memories, or nanotechnology-based storage media such as carbon nanofiber/nanotube-based substrates. The currently most common technology uses NAND flash memory as inexpensive storage memory. All these technologies have in common that they eliminate mechanical access latencies and, therefore, deliver performance that is substantially higher than that known for conventional electro-mechanical hard disk drives.
One of the functional consequences of the increased performance of non-volatile memory-based mass storage devices is that the host transfer rate becomes a limiting factor. In most scenarios, this transfer rate between the device itself and the host (computer) is sufficient to accommodate the internal transfer rate between the storage media and the on-device controller. However, there are special scenarios where the host interface becomes a bottleneck. A case in point is the situation where data are copied or moved from one location on the device to another location without any modification. In this case, the user-induced processing time of data as, for example, re-coding of audio-visual contents is no longer a contributing factor to the overall execution time of the task. Consequently, only the raw copy speed from one physical location to another limits the completion of the workload.
Regardless of whether the data are modified or whether an exact bit-to-bit copy of the data is performed, the data still have to be read out of the device into the host, temporarily stored in system memory, and then written back to the device. In Serial ATA devices, the host interface is dual-ported, meaning that it supports concurrent read and write transactions. On the other hand, there are still substantial delays associated with the overall round-trip of data from the drive controller to the host bus adapter and system interconnect to the memory controller, and finally to the DRAM and back.
Particularly for copies of data, irrespective of whether it is for another working copy or else to preserve version differences of the same document or any other purpose, it would be advantageous to have a shortcut on the device itself to perform exactly this type of data transfer without consuming valuable cycles on the various controllers on the system level that could lead to bus contention and without wasting memory bandwidth.